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Model 3650 SoC Test System
50/100 MHz
Key Features


  • 50 /100 MHz
  • 512 digital I/O pins
  • 16/32 MW vector memory
  • 16/32 MW pattern instruction memory
  • Multi-site testing up to 32 sites
  • Per-pin test architecture
  • Up to 8 16-bit ADDA channels option
  • Up to 2Gbit X 8 CH scan depth option
  • ALPG option for memory test
  • Up to 32 high-voltage pins
  • 32 high-performance DPS channels
  • Overall timing accuracy < ±550 ps
  • Up to 32-CH VI-50 analog option
  • Up to 8-CH PVI analog option
  • Microsoft Windows® XP OS
  • C++ and GUI programming interface
  • CRISP full suite of intuitive software tools
  • Test template for test program creation
  • Test program and pattern converters for other platforms
  • Accept DIB and probe card of other testers directly
  • Support STDF data output
  • Air-cooled, small footprint tester-in-a-test-head design
Data Sheet


  • Product Details
  • Specifications
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Product Details

64 Channel Digital Pin Card


CP Docking Solution

Chroma 3650 brings you the most cost-effective SoC tester 

When the cost of devices keep going down and profit margin keep shrinking, how to find a good test solution for reducing the cost of testing, raising the yield and also keeping the good quality of devices has never been more important than it is today. Chroma 3650 is a SoC tester with high throughput and high parallel test capabilities to provide the most cost-effective solution for fabless, IDM and testing houses. With the full functions of test,high accuracy, powerful software tools and excellent reliability,3650 has the versatile test capabilities for high-performance microcontroller, consumer SoC devices, the peripheral IC devices of PC and digital wafer sort applications.


High performance in a low-cost production system 

The 3650 achieves lower test cost not only by reducing the cost of tester system but also by testing more devices faster and the high parallel test capability. With the Chroma PINF IC and the sophisticated calibration system, 3650 has the excellent overall timing accuracy within ±550ps. The pattern generator of 3650 has up to 32M pattern instruction memory. By having the same depth as the vector memory, Chroma 3650 allows to add pattern instruction for each vector. Moreover, the powerful sequential pattern generator provides the variety of pattern commands to meet the demands of complex test vectors. The true test-per-pin architecture and the flexible site mapping with no slot boundaries are designed for multi-site test with high throughput. Up to 512 digital pins, 32 device power supplies, per-pin PMU and the analog test capability, 3650 delivers a combination of high test performance and throughput with cost-effective test solution.


High parallel test capability 

The powerful, versatile parallel pin electronics resources of 3650 can simultaneously perform identical parametric tests on multiple pins. The 3650 integrates 64 digital pins onto one single LPC board. In each LPC board, it contains 16 high performance Chroma PINF ICs which owns 4 channels timing generator within 50ps accuracy. The integration of local controller circuitry manages resources setup and result readout, and therefore cuts the overhead time of the system controller. With the any-pin-to-any-site mapping design,3650 provides up to 32 sites high throughput parallel testing capabilities to enlarge the mass production performance with more flexible and easy layout.



The semiconductor industry is a fast moving one, and capital equipment must be built to outlive several device generations. With selective options, like AD/DA converter test, ALPG for memory test, high voltage PE and multiple scan chain test option,Chroma 3650 makes sure that it will serve you for years to come. Moreover, Chroma 3650 platform architecture allows development of focused instruments by third-party suppliers that can be easily added for specific applications. It can stretch the boundaries of test by covering a broader range of devices than ever before possible in a low-cost production test system.


Powerful suite of software tools – CRISP 

The 3650 features the powerful suite of software tools using Chroma Integrated Software Platform, CRISP. Not only provides the rapid test development function, CRISP covers all needs for test debugging, production and data analysis. The CRISP integrates the software functions of test development, test execution control, data analysis and tester management together. Based on the Microsoft Windows XP® operation system and C++ programming language, CRISP provides the powerful, easy-to-use, intuitive, and fast-runtime GUI tools for users. In the Project IDE tool, test developer can easily shift between standard template, user-defined template and C++ code-based editor to create their test program quickly and automatically scale to multi-site for parallel test. Besides, CRISP also provides the test program and test pattern converters to facilitate the test conversion from other tester platforms to 3650.

3650 Software

For the test program execution controller, user can select the System Control tool or Plan Debugger tool for normal mode or debugging mode. In the Plan Debugger tool, user can control the execution of test program by setting break point, step, step-into, step-over, resume execution, variable-watch and variable-modify, etc. For the test debugging and data analyzing purposes, 3650 provides abundant software utility tools. Datalog, Waveform and Scope tools are designed to support the measured data and digital waveform display. To find the parametric margin, SHMOO and Pin Margin tools can easily accomplish debug by auto-mode or manual-mode execution. Besides, the Wafer Map, Summary, Histogram and STDF tools are very helpful and powerful for collecting the test results and analyzing the parametric characterization. As for the Test Condition Monitor and Pattern Editor tools, they provide the superior functions for run-time debugging to change the test conditions or pattern data without breaking the test or modifying the source files. Besides, CRISP also prepares the ADDA tool and Bit Map tool for the analog and ALPG option. Using the ADDA tool, user can not only see the AD/DA test result by graphic tool, user can also create the ADC pattern easily. The full suite of powerful GUI tools will definitely meet the various purposes for test debugging and test report.

The OCI tool is the solution of CRISP for mass production.  Easy-and-correct operation is the most important request for production run. Programmer can customize the setup of OCI tool by the Production Setup tool to meet the production environment requirement in advance. Then, what an operator has to do is just to select the planned process to start the mass production.



The 3650 provides multiple drivers for communications with handler and prober by GPIB and TTL interface. The supported handlers or probers include SEIKO-EPSON, SHIBASOKU, MULTITEST, ASECO, DAYMARC, TEL, TSK and OPUS II, and so forth. In addition to provide the convenient converter tools for test platform migration, 3650 provides the adaptor board solution for existed tester platform to save the cost of users. Through the adaptor board solution, Chroma 3650 can accept the DIB and probe card of other testers directly to save the cost for making the new load boards and probe cards.


Small footprint 

With the air-cooled and small footprint tester-in-a-test-head design, 3650 delivers high throughput in a highly integrated package for minimum floor space. A mainframe cabinet contains the power distribution units and the space for third-party instruments. With an optional manipulator, 3650 can be used in both package and wafer test.


Application support 

Chroma offers the application support solutions to its new and established customers to accurately meet user needs. On request Chroma can provide customized support designed around your specific needs. Whether you need ramp up production, want to capitalize on emerging market opportunities, enhance productivity, lower testing costs with innovative strategies, Chroma worldwide customer support staff is committed to generate timely and efficient solution for you.

 Model    3650  
 Test Rate    50 / 100 MHz  
 Maximum Number of Pins (increment)    512 pins (64 pins/board)  
 Vector Depth    16M / 32M (max.) per pin  
 Over All Timing Accuracy    ± 550 ps  
 Wave/Strobe Format    4096 timing / waveform combination , change on the fly  
 System Programming Language/ OS    C, C++, Window XP  
 Parallel test capability    32 DUT / 512 pins  
 Timing Generator Per Pin   
 No. of Edges    6 edges / pin (2 Driver, 2 Driver & I/O, 2 Strobe)  
 No. of Timing Sets    32 sets / pin  
 Edge Setting Resolution    62.5ps  
 Device power supply   
 DPS Channel    32 channels / 512 pins (max.)  
 Voltage Range    ± 8V, ± 16V ( 2 range)  
 Current Ganged Channel    2 (max.)  
 Maximum Output Current    ± 0.8 A / 1 ch (8 V), ± 0.4 A / 1 ch (16 V)  
 DC Measurement (PMU)   
 PMU Channel    16 channels / 512 pins (max.) (2 PMU/LPC)  
 PMU Voltage Range    ± 2.5 V / ± 8 V / ± 16 V  
 PMU Current Range    800 nA / 8 uA / 80 uA / 800 uA / 8 mA / 80 mA / 250 mA  
 PPMU Channel    1 channel / 1 pin  
 PPMU Voltage Range    -2V ~ +7V  
 PPMU Current Forced Range    35mA  
 PPMU Current Measured Range    10uA / 100uA / 1mA / 10mA  
 Amplitude    0.1 V ~ 9 V  
 VIL/VIH Range    -2V~+6V / -1.9V~+7V  
 VIL/VIH Reference Level    Per Pin  
 Switching time (ON/OFF)    2.5 ns ± 1 ns / 2.75 ns ± 1.25 ns  
 Switching time accuracy    ±300 ps  
 Switching dead band    ≤7.6 ns (under standard load board)  
 VOL/VOH Assigned Range    -2 V ~ +7 V  
 Min. Window Strobe Width    5ns  
 VOL/VOH Reference Level    Per Pin  
 Band Width    250 MHZ  
 Programmable Load   
 IOL/IOH Setting Range    0 ~ -35 mA / 0 ~ +35 mA  
 VREF Setting Range    -2 V ~ +7 V  
 IOL/IOH/VREF DAC    Per Pin  
 AD/DA Measurement Unit (Option)   
 AD/DA Channel    8 channels / 512 pins (1 ADDA channel / LPC)  
 Voltage Reference Channel    2  
 Analog In/Out Channel    1  
 Digital I/O Channel    16 bits  
 Voltage Range    2.25 V / 4.5 V / 9 V / ±2.25 V / ±4.5 V / ±9 V  
 Voltage Resolution    38.125 uV / 76.25 uV / 152 uV / 76.25 uV / 152.5 uV / 305 uV  
 Max Conversion Rate    500 KHz  
 High Voltage Driver (Option)   
 HV Channel    32 channels / 512 pins (4 HV channels / LPC)  
 VIL/VIH Range    0V~+14.78 V / 0.22 V~+15 V  
 VIL/VIH DC Current    ± 60 mA  
 ALPG (Option)   
 Address Pattern Generator    X=16, Y=16 / LPC  
 Data Pattern Generator    D=16 / LPC  
 Scan Chain (Option)   
 Chain number / LPC    1 / 2 / 4 / 8 / 16  
 Size per chain @ 16M    1024M / 512M / 256M / 128M / 64M  
 Size per chain @ 32M    2048M / 1024M / 512M / 256M / 128M  
 System and Dimensions   
 Power Consumption    10 KW (max.)  
 Cooling System    Forced Air Cooling  
 Test Head (L x W x H)    800 x 744 x 612 mm  
 Mainframe (L x W x H)    850 x 850 x 1680 mm  

All specifications are subject to change without notice.

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